1. Field of the Invention
The present invention concerns an electronic switching element or component having at least two stages. It can be employed in coded signal time switching systems and, more particularly, in telephone exchanges involving time division switching of signals which have been subjected to pulse code modulation.
2. Description of the Prior Art
At the inputs of such an exchange, the signals originating from busy lines are sampled at 8 kHz and each sample is translated into a coded combination of eight binary signals (bits). Each combination is transmitted in series over a conductor, within a very short time slot constituting a time channel. It is thus possible to time multiplex 32 channels for instance. The period of recurrence of the successive combinations of a channel is 125 micro seconds, whereas the time slot provided for each channel lasts about 4 micro seconds. An incoming multiplex group routes the signals originating from 32 lines. A similar outgoing multiplex group routes the signals intended to these same 32 lines.
Inside the exchange, there will be generally many incoming and outgoing multiplex groups. It is necessary that any coded combination appearing on a time channel of a multiplex group may be retransmitted over any time channel of any multiplex group. This involves space (connections from group to group) and time (connections from channel to channel) switching operations. These will be performed by means of a network including space switches and memories. This network may be, for instance, of a well-known time-space-time type.
In a simplified embodiment, this network will include an incoming memory with 32 cells for each incoming 32-channel group and an outgoing memory with 32 cells for each outgoing 32-channel group. The incoming memories will be connected to the outgoing 32-channel group. The incoming memories will be connected to the outgoing memories through a connection network enabling each incoming memory to have access to each outgoing memory.
A connection between an incoming channel of an incoming group and an outgoing channel of an outgoing group thus uses a cell allocated to the incoming channel in the incoming memory assigned to the incoming group, a connection path between this incoming memory and the outgoing memory assigned to the outgoing group and a cell of this outgoing memory allocated to the outgoing channel. At the time assigned to the incoming channel, a coded combination, received in series on the incoming group, is recorded in the incoming memory cell. During the channel time selected for the considered connection, the connection path is established between the incoming memory and the outgoing memory, the incoming memory cell is read and the combination which it contains is routed, in series, through the connection path, up to the outgoing memory; there, it is recorded in the memory cell of the outgoing channel. Finally, at the channel time assigned to the outgoing channel, the outgoing memory cell is read and the coded combination which it contains is transmitted in series over the outgoing group.
The network connecting the incoming memories to the outgoing memories must consequently be able to provide, at each channel time, as many connection paths as there are incoming (or outgoing) memories. It will be necessarily electronic because of the required speed and it is obviously to be desired that it may be compact, which contributes to the operating speed, but also it may have a small dissipation of heat, which allows better compactness and, of course, its price must be as low as possible.
In accordance with the requirements set forth above, it is suggested that this network be assembled as a group of switching modules mounted on printed circuit boards. The French Pat. No. 71 43195 filed on Dec. 2, 1971 (corresponding to U.S. patent application Ser. No. 308,295 filed Nov. 20, 1972 now U.S. Pat. No. 3,865,989 and assigned to International Standard Electric Company) in the name of Compagnie Generale de Constructions Telephoniques for "Module de commutation electronique" (electronic switching module) describes such a module constructed in the shape of an integrated circuit in M.O.S. (metal - oxyde - semi-conductor) technology and which constitutes a connection matrix with eight inputs and eight outputs. Many modules of this type can be mounted on a medium sized board. However, a problem occurs because of the limited number of the input and output connections of the board.
Indeed, printed circuit boards are generally provided with connectors offering a limited number of connection points. In other respects, each switching module comprises eight inputs which must be connected to incoming memories or eight outputs which must be connected to outgoing memories, and at least eight address inputs to control the connections, say at least 16 circuits to be extended out of the board. As the connectors now available enable only the use of two hundred connection points, it is noted that it has not been practical to mount more than 10 modules on a board which could otherwise support a much larger number of these modules.
Thus, equipment limitations which can seem to be of minor importance result in a considerable reduction in connection network compactness and, consequently, in its operating speed.